276 Commits (b07d2a4630476ae61569b7d17c88bef8df1dd356)
 

Author SHA1 Message Date
Timothy Pearson 9c98267db3 Add missing Debian install file
11 years ago
Timothy Pearson 5bb4cd0a02 Add trigger channel set to scope part
11 years ago
Timothy Pearson 15a8d153cc Remove accidentally included Makefile.in
11 years ago
Timothy Pearson 55e9906b78 Add timebase controls to scope part
11 years ago
Timothy Pearson 31f91d555b Add GETHORIZTIMEBASE to gpib server
11 years ago
Timothy Pearson 260c25ebe5 Add GETPERMITTEDSDIVS command to gpib server
11 years ago
Timothy Pearson de23e8f184 Fix a number of out of range warnings
11 years ago
Timothy Pearson 63b68e2dfb Add ability to set digital trace viewer cursors with the mouse
11 years ago
Timothy Pearson f65487c882 Add ability to display values of traces at selected cursor position
11 years ago
Timothy Pearson d7b08ca2de Fill area under logical 1s in TraceWidget digital mode
11 years ago
Timothy Pearson bc7497f24c Fix slow TraceWidget redraw
11 years ago
Timothy Pearson e8984bf61b Update database license header
11 years ago
Timothy Pearson b3e3e2a841 Update date range in README
11 years ago
Timothy Pearson 527d7b20ca Clean up libtdekrb license headers
11 years ago
Timothy Pearson 98182bf21a Update license headers in TDE client
11 years ago
Timothy Pearson 6ed57d34ca First pass of logic analyzer functionality (GPMC interface and server)
11 years ago
Timothy Pearson 1fbfe13066 First pass of logic analyzer functionality (client and FPGA core)
11 years ago
Timothy Pearson 6ae28a47f7 Add left trace sidebar option to trace viewer widget
11 years ago
Timothy Pearson 72e80dda8e Add ability to hard reset user device
11 years ago
Timothy Pearson 2dc576d25f Hard reset user device on connection and disconnection of FPGA viewer
11 years ago
Timothy Pearson ed6e66626b Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 2cea70caec Automatically prompt for username/password if Kerberos ticket is invalid
11 years ago
Timothy Pearson 779eb9804b Fix FPGA server FTBFS on amd64
11 years ago
Timothy Pearson e32d9c1767 Fix serial server init file
11 years ago
Timothy Pearson 737ddb96ff Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 8783469649 Fix incorrect file names
11 years ago
Timothy Pearson 55f109d365 Add serial console client
11 years ago
Timothy Pearson c912b0f1d3 Add serial console server
11 years ago
Timothy Pearson 06f302400e Fix prototerminal reception of multiple lines of text
11 years ago
Timothy Pearson 1825d32921 Add prototyping terminal to uLab client for TDE
11 years ago
Timothy Pearson 038275fcc0 Add serial I/O to host FPGA
11 years ago
Timothy Pearson dc91899c25 Add initial version of a logic analyzer server
11 years ago
Timothy Pearson 061289c613 Max out logic analyzer memory
11 years ago
Timothy Pearson 13aee3afa9 Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 1eb48edeba Add logic analyzer block to control FPGA
11 years ago
Timothy Pearson 32b7b87d3d Lower the uLab FPGA viewer GPMC clock to reduce errors on prototype lashup
11 years ago
Timothy Pearson 0ffb793cb5 Relayout the GUI to be more in line with expected norms
11 years ago
Timothy Pearson 37420cfb78 Increase DSP memory size
11 years ago
Timothy Pearson 4436bddc8c Add GPMC interface to FPGA server
11 years ago
Timothy Pearson 4123289a7a Update common modules
11 years ago
Timothy Pearson a4eb2fb6bf Move hardware design files to their correct locations
11 years ago
Timothy Pearson 04ab7c6632 Add initial GOMC compatible uLab debug system hardware design files
11 years ago
Timothy Pearson 963b88fb0b Add initial GPMC test program and associated files for BeagleBone Black
11 years ago
Timothy Pearson 38c56c7c1f Add initial version of SVF player for Beaglebone Black
11 years ago
Timothy Pearson 26c1236cdc Fix prior commit
11 years ago
Timothy Pearson 5c2d024b38 Fix progress bar not moving during DSP data reception
11 years ago
Timothy Pearson 8ce60c7f52 Fix prior commit
11 years ago
Timothy Pearson f27e0f0184 Allow data processing RAM size to be configured by changing a Verilog parameter on the FPGA side
11 years ago
Timothy Pearson 8faa3da109 Fix image distortion when certain greyscale values are utilized
11 years ago
Timothy Pearson b783a26949 Increase FPGA viewer refresh rate and add configuration option for same
11 years ago