Timothy Pearson
|
976f4c5dfe
|
Use 10-pin headers for ulab debug interface serial port on Spartan 6
|
12 years ago |
Timothy Pearson
|
3f00d517b8
|
Add sample image processing module to Spartan 6 demo project
|
12 years ago |
Timothy Pearson
|
400d0abcff
|
Avoid usage of TQTimer::singleShot in the FPGA viewer part
Repair "think-o" in the Spartan 6 block RAM HDL
|
12 years ago |
Timothy Pearson
|
9d5b0368df
|
Add sample design for Spartan 6 and ISE 14.4
|
12 years ago |
Timothy Pearson
|
40acabc2bf
|
Update remote debug module and clean up FPGA section of the source tree
|
12 years ago |
Timothy Pearson
|
db7e77be8f
|
Add public domain FPGA files for Xilinx s3/s3e
|
13 years ago |