Timothy Pearson
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5c2d024b38
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Fix progress bar not moving during DSP data reception
Fix syntax error in demo main.v file
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11 years ago |
Timothy Pearson
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f27e0f0184
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Allow data processing RAM size to be configured by changing a Verilog parameter on the FPGA side
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11 years ago |
Timothy Pearson
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7997af3f4f
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Fix 7-segment LED display and add sample driver for the same
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11 years ago |
Timothy Pearson
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3f00d517b8
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Add sample image processing module to Spartan 6 demo project
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11 years ago |
Timothy Pearson
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9d5b0368df
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Add sample design for Spartan 6 and ISE 14.4
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11 years ago |