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remotelaboratory
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7 Commits (2cea70caec003917ede16e53d91d151c4c9e555c)

Author SHA1 Message Date
Timothy Pearson 038275fcc0 Add serial I/O to host FPGA
11 years ago
Timothy Pearson 061289c613 Max out logic analyzer memory
11 years ago
Timothy Pearson 1eb48edeba Add logic analyzer block to control FPGA
11 years ago
Timothy Pearson 0ffb793cb5 Relayout the GUI to be more in line with expected norms
11 years ago
Timothy Pearson 37420cfb78 Increase DSP memory size
11 years ago
Timothy Pearson a4eb2fb6bf Move hardware design files to their correct locations
11 years ago
Timothy Pearson 04ab7c6632 Add initial GOMC compatible uLab debug system hardware design files
11 years ago