Timothy Pearson
|
0ffb793cb5
|
Relayout the GUI to be more in line with expected norms
Add user logic reset signal
Stabilize data transfer
|
11 years ago |
|
Timothy Pearson
|
f27e0f0184
|
Allow data processing RAM size to be configured by changing a Verilog parameter on the FPGA side
|
11 years ago |
|
Timothy Pearson
|
fda60e9d28
|
Work around data transfer problems in FTDI serial converters
Fix glitches in FPGA viewer part
|
11 years ago |
|
Timothy Pearson
|
d5316f5795
|
Add interface mode selection
Make servers use less CPU
|
12 years ago |
|
Timothy Pearson
|
c21c4b0e01
|
Fix UI layout of FPGA part
|
12 years ago |
|
Timothy Pearson
|
3218775391
|
Add initial batch mode processing logic
|
12 years ago |
|
Timothy Pearson
|
9b06e81c07
|
Add preliminary basic remotefpga protocol support
|
12 years ago |
|
Timothy Pearson
|
623cde93fd
|
Stabilize clients and complete basic view layout/widgets
|
12 years ago |
|
Timothy Pearson
|
963501ff41
|
Fix crashes in servers
Start work on FPGA client
|
12 years ago |
|
Timothy Pearson
|
65886d792d
|
Add skeleton for FPGA viewer
Fix authserver crash
|
12 years ago |
