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Fix image distortion when certain greyscale values are utilized

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Store last used values in FPGA viewer and programmer GUI for convenience on GUI restart
master
Timothy Pearson 11 years ago
parent b783a26949
commit 8faa3da109
6 changed files with 215 additions and 179 deletions
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13
clients/tde/src/part/fpgaprogram/part.cpp
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@ -103,6 +103,11 @@ FPGAProgramPart::FPGAProgramPart(TQWidget *parentWidget, const char *widgetName,
// Create widgets
m_base = new FPGAProgramBase(widget());
// Load configuration
m_config = new KSimpleConfig("ulab_client_part_fpgaprogrammer.conf", false);
m_config->setGroup("UI");
m_base->programmingInputFile->setURL(m_config->readPathEntry("programmingInputFile", ""));
// Initialize widgets
m_base->setMinimumSize(500,350);
m_base->programmingLogBox->setReadOnly(true);
@ -115,6 +120,12 @@ FPGAProgramPart::FPGAProgramPart(TQWidget *parentWidget, const char *widgetName,
}
FPGAProgramPart::~FPGAProgramPart() {
// Save field state for restoration on next load
m_config->setGroup("UI");
m_config->writeEntry("programmingInputFile", m_base->programmingInputFile->url());
m_config->sync();
delete m_config;
if (m_connectionMutex->locked()) {
printf("[WARNING] Exiting when data transfer still in progress!\n\r"); fflush(stdout);
}
@ -165,6 +176,7 @@ void FPGAProgramPart::connectionClosed() {
void FPGAProgramPart::postInit() {
setUsingFixedSize(false);
processLockouts();
}
bool FPGAProgramPart::openURL(const KURL &url) {
@ -317,6 +329,7 @@ void FPGAProgramPart::mainEventLoop() {
}
setTickerMessage(i18n("Connected"));
processLockouts();
if (m_commHandlerState == ModeIdle_StateProcessStatus) {
m_pingDelayTimer->start(250, TRUE);

5
clients/tde/src/part/fpgaprogram/part.h
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@ -15,7 +15,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* (c) 2012 Timothy Pearson
* (c) 2012-2013 Timothy Pearson
* Raptor Engineering
* http://www.raptorengineeringinc.com
*/
@ -29,6 +29,8 @@
#include <tqframe.h>
#include <tqimage.h>
#include <ksimpleconfig.h>
#include <tdeparts/browserextension.h>
#include <tdeparts/statusbarextension.h>
#include <tdeparts/part.h>
@ -81,6 +83,7 @@ namespace RemoteLab
private:
FPGAProgramBase* m_base;
TQMutex* m_connectionMutex;
KSimpleConfig* m_config;
TQTimer* m_pingDelayTimer;
TQTimer* m_forcedUpdateTimer;
TQTimer* m_updateTimeoutTimer;

53
clients/tde/src/part/fpgaview/part.cpp
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@ -15,7 +15,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* (c) 2012 Timothy Pearson
* (c) 2012-2013 Timothy Pearson
* Raptor Engineering
* http://www.raptorengineeringinc.com
*/
@ -589,7 +589,7 @@ FPGAViewPart::FPGAViewPart(TQWidget *parentWidget, const char *widgetName, TQObj
m_commHandlerState(0), m_commHandlerMode(0), m_commHandlerNextState(0), m_commHandlerNextMode(0), m_connectionActiveAndValid(false), m_tickerState(0), m_remoteInputModeEnabled(false), m_4bitInputValue(0), m_4bitOutputValue(0),
m_8bitInputValue(0), m_8bitOutputValue(0), m_16bitInputValue(0), m_16bitOutputValue(0), m_7segDigit3OutputValue(0xff),
m_7segDigit2OutputValue(0xff), m_7segDigit1OutputValue(0xff), m_7segDigit0OutputValue(0xff),
m_batchOutputFile(NULL), m_dataOutputFile(NULL),
m_batchOutputFile(NULL), m_dataOutputFile(NULL), m_dataMemorySize(16384),
m_inputImageViewer(NULL), m_outputImageViewer(NULL)
{
// Initialize important base class variables
@ -611,6 +611,16 @@ FPGAViewPart::FPGAViewPart(TQWidget *parentWidget, const char *widgetName, TQObj
// Create widgets
m_base = new FPGAViewBase(widget());
// Load configuration
m_config = new KSimpleConfig("ulab_client_part_fpgaviewer.conf", false);
m_config->setGroup("UI");
m_interfaceMode = (RemoteLab::FPGAViewPart::InterfaceMode)(m_config->readNumEntry("interfaceMode", BasicInterfaceMode));
m_base->batchTestInputFile->setURL(m_config->readPathEntry("batchTestInputFile", ""));
m_base->batchTestOutputFile->setURL(m_config->readPathEntry("batchTestOutputFile", ""));
m_base->batchTest16BitCheckBox->setChecked(m_config->readBoolEntry("batchUsing16Bit", false));
m_base->dataProcessingInputFile->setURL(m_config->readPathEntry("dataProcessingInputFile", ""));
m_base->dataProcessingOutputFile->setURL(m_config->readPathEntry("dataProcessingOutputFile", ""));
// Create menu actions
// Submenus
TDEActionCollection *const ac = actionCollection();
@ -740,12 +750,21 @@ FPGAViewPart::FPGAViewPart(TQWidget *parentWidget, const char *widgetName, TQObj
connect(m_base->dataProcessingInputFile, SIGNAL(textChanged(const TQString &)), this, SLOT(processLockouts()));
connect(m_base->dataProcessingOutputFile, SIGNAL(textChanged(const TQString &)), this, SLOT(processLockouts()));
processAllGraphicsUpdates();
TQTimer::singleShot(0, this, TQT_SLOT(postInit()));
}
FPGAViewPart::~FPGAViewPart() {
// Save field state for restoration on next load
m_config->setGroup("UI");
m_config->writeEntry("interfaceMode", m_interfaceMode);
m_config->writeEntry("batchTestInputFile", m_base->batchTestInputFile->url());
m_config->writeEntry("batchTestOutputFile", m_base->batchTestOutputFile->url());
m_config->writeEntry("batchUsing16Bit", m_base->batchTest16BitCheckBox->isChecked());
m_config->writeEntry("dataProcessingInputFile", m_base->dataProcessingInputFile->url());
m_config->writeEntry("dataProcessingOutputFile", m_base->dataProcessingOutputFile->url());
m_config->sync();
delete m_config;
// Close any active image display windows
m_interfaceMode = BasicInterfaceMode;
if (m_inputImageViewer) {
@ -1056,6 +1075,8 @@ void FPGAViewPart::connectionClosed() {
}
void FPGAViewPart::postInit() {
processAllGraphicsUpdates();
setUsingFixedSize(true);
connect(m_updateTimer, SIGNAL(timeout()), this, SLOT(updateDisplay()));
connect(m_timeoutTimer, SIGNAL(timeout()), this, SLOT(updateDisplay()));
@ -1433,7 +1454,7 @@ void FPGAViewPart::updateDisplay() {
// Is it an image?
m_dataIsImage = m_dataInputImage.load(m_base->dataProcessingInputFile->url());
if ((file.size() <= 16384) || ((m_dataIsImage) && ((m_dataInputImage.height()*m_dataInputImage.width()) <= 16384))) {
if ((file.size() <= m_dataMemorySize) || ((m_dataIsImage) && ((m_dataInputImage.height()*m_dataInputImage.width()) <= m_dataMemorySize))) {
m_base->dataProcessingProgressBar->setTotalSteps(0);
m_base->dataProcessingProgressBar->setProgress(0);
@ -1472,23 +1493,21 @@ void FPGAViewPart::updateDisplay() {
m_socket->writeBlock("M\r", 2);
m_socket->writeBufferedData();
int len = m_dataByteArray.size();
int txlen = 16384;
int txlen = m_dataMemorySize;
if (len >= txlen) {
len = txlen;
}
TQByteArray dataToSend(16384*2);
TQByteArray dataToSend(m_dataMemorySize);
for (i=0; i<len; i++) {
dataToSend[(i*2)+0] = m_dataByteArray[i];
dataToSend[(i*2)+1] = '\r';
dataToSend[i] = m_dataByteArray[i];
}
for (; i<txlen; i++) {
dataToSend[(i*2)+0] = 0;
dataToSend[(i*2)+1] = '\r';
dataToSend[i] = 0;
}
m_base->dataProcessingProgressBar->setTotalSteps(txlen*4);
m_base->dataProcessingProgressBar->setTotalSteps(txlen*2);
m_base->dataProcessingProgressBar->setProgress(0);
int offset = 0;
while (offset < (txlen*2)) {
while (offset < txlen) {
m_socket->writeBlock(dataToSend.data()+offset, 1024);
m_socket->writeBufferedData();
offset = offset + 1024;
@ -1553,13 +1572,13 @@ void FPGAViewPart::updateDisplay() {
}
}
else if (m_commHandlerState == 2) {
if (m_socket->bytesAvailable() >= 16384) {
TQByteArray recData(16384);
if (m_socket->bytesAvailable() >= m_dataMemorySize) {
TQByteArray recData(m_dataMemorySize);
int offset = 0;
while (offset < 16384) {
while (offset < m_dataMemorySize) {
m_socket->readBlock(recData.data()+offset, 1024);
offset = offset + 1024;
m_base->dataProcessingProgressBar->setProgress((16384*2) + offset);
m_base->dataProcessingProgressBar->setProgress((m_dataMemorySize*2) + offset);
}
m_base->dataProcessingStatusLabel->setText(i18n("Writing data to file") + "...");

6
clients/tde/src/part/fpgaview/part.h
Unescape View File

@ -15,7 +15,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* (c) 2012 Timothy Pearson
* (c) 2012-2013 Timothy Pearson
* Raptor Engineering
* http://www.raptorengineeringinc.com
*/
@ -29,6 +29,8 @@
#include <tqframe.h>
#include <tqimage.h>
#include <ksimpleconfig.h>
#include <tdeparts/browserextension.h>
#include <tdeparts/statusbarextension.h>
#include <tdeparts/part.h>
@ -207,6 +209,7 @@ namespace RemoteLab
private:
FPGAViewBase* m_base;
TQMutex* m_connectionMutex;
KSimpleConfig* m_config;
TQTimer* m_updateTimer;
TQTimer* m_timeoutTimer;
@ -247,6 +250,7 @@ namespace RemoteLab
TQImage m_dataInputImage;
TQFile* m_dataOutputFile;
TQByteArray m_dataByteArray;
int m_dataMemorySize;
ImageViewerWindow* m_inputImageViewer;
ImageViewerWindow* m_outputImageViewer;

77
fpga/common/remote_access.v
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@ -51,9 +51,12 @@ module remote_access(
output remote_access_lcd_rw_out,
output remote_access_lcd_enable_out);
parameter RAM_ADDR_BITS = 14;
reg [7:0] remote_access_4_bit_input_reg;
reg [7:0] remote_access_8_bit_input_reg;
reg [15:0] remote_access_16_bit_input_reg;
reg [15:0] remote_access_data_ram_size_reg = (2**RAM_ADDR_BITS);
reg [3:0] remote_access_lcd_data_out_reg;
reg remote_access_lcd_rs_out_reg;
reg remote_access_lcd_rw_out_reg;
@ -197,7 +200,7 @@ module remote_access(
reg [13:0] data_storage_addra_reg;
reg data_storage_write_enable_reg;
data_storage data_storage(.clka(data_storage_clka), .dina(data_storage_dina), .addra(data_storage_addra),
data_storage #(RAM_ADDR_BITS) data_storage(.clka(data_storage_clka), .dina(data_storage_dina), .addra(data_storage_addra),
.wea(data_storage_write_enable), .douta(data_storage_data_out));
assign data_storage_clka = (data_storage_remote_enable) ? main_fifty_clock : sram_clock_in;
@ -258,7 +261,6 @@ module remote_access(
reg enable_remote_access_input = 1;
reg remote_access_input_enable_prev = 0;
reg prev_was_carriage_return = 0;
reg [7:0] lcd_display_string [31:0];
@ -391,7 +393,7 @@ module remote_access(
transmit_dsp_status_counter = transmit_dsp_status_counter + 1;
data_storage_addra_reg = transmit_dsp_status_counter;
if (transmit_dsp_status_counter > 16384) begin
if (transmit_dsp_status_counter >= (2**RAM_ADDR_BITS)) begin
transmit_dsp_status_done = 1;
data_storage_write_enable_reg = 1'bz;
data_storage_addra_reg = 14'bz;
@ -576,9 +578,40 @@ module remote_access(
serial_rx_data_reg = RxD_data;
serial_rx_strobe_reg = 1; // Signal new data...
if (seize_serial_tx == 0) begin
if (next_byte_is_command_prev_command == 77) begin
// DSP input data
if (dsp_update_counter < (2**RAM_ADDR_BITS)) begin
data_storage_remote_enable = 1;
data_storage_addra_reg = dsp_update_counter;
data_storage_dina_reg = serial_rx_data_reg;
data_storage_write_enable_reg = 1;
data_write_timer = 3;
dsp_update_counter = dsp_update_counter + 1;
// TESTING ONLY!!!
//if (dsp_update_counter < 17) begin
// received_lcd_display_string[dsp_update_counter - 1] = serial_command_buffer;
//end
if (dsp_update_counter >= (2**RAM_ADDR_BITS)) begin
next_byte_is_command = 0;
data_storage_write_enable_reg = 0;
data_storage_remote_enable = 0;
sram_available_reg = 1;
data_storage_write_enable_reg = 1'bz;
data_storage_addra_reg = 14'bz;
waiting_on_dsp_processing = 1;
transmit_dsp_rx_complete = 1;
next_byte_is_command_prev_command = 0;
// TESTING ONLY!!!
//transmit_dsp_status = 1;
end
end
end else begin
// Parse the command and see what it is
serial_character_received = 1;
if (RxD_data == 13) begin
if (serial_rx_data_reg == 13) begin
// Carriage Return! The serial_command_buffer holds the command! Parse it!
if (next_byte_is_command == 0) begin
if (serial_command_buffer == 65) begin
@ -701,36 +734,6 @@ module remote_access(
next_byte_is_command = 0;
end
end
// DSP input data
if (next_byte_is_command_prev_command == 77) begin
if (dsp_update_counter < 16384) begin
data_storage_remote_enable = 1;
data_storage_addra_reg = dsp_update_counter;
data_storage_dina_reg = serial_command_buffer;
data_storage_write_enable_reg = 1;
data_write_timer = 3;
dsp_update_counter = dsp_update_counter + 1;
// TESTING ONLY!!!
//if (dsp_update_counter < 17) begin
// received_lcd_display_string[dsp_update_counter - 1] = serial_command_buffer;
//end
if (dsp_update_counter >= 16384) begin
next_byte_is_command = 0;
data_storage_write_enable_reg = 0;
data_storage_remote_enable = 0;
sram_available_reg = 1;
data_storage_write_enable_reg = 1'bz;
data_storage_addra_reg = 14'bz;
waiting_on_dsp_processing = 1;
transmit_dsp_rx_complete = 1;
// TESTING ONLY!!!
//transmit_dsp_status = 1;
end
end
end
end
end
@ -741,12 +744,6 @@ module remote_access(
serial_command_buffer = RxD_data;
//end
if (RxD_data == 13) begin
prev_was_carriage_return = 1;
end else begin
prev_was_carriage_return = 0;
end
serial_receiver_toggler = serial_receiver_toggler + 1;
end
end

2
fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/data_storage.v
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@ -13,8 +13,8 @@ module data_storage(
input wea,
output reg [7:0] douta);
parameter RAM_WIDTH = 8;
parameter RAM_ADDR_BITS = 14;
parameter RAM_WIDTH = 8;
// Xilinx specific directive
(* RAM_STYLE="BLOCK" *)

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