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394 lines
11 KiB
394 lines
11 KiB
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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//
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// uLab to ARM GPMC interface
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// (c) 2014 Timothy Pearson
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// Raptor Engineering
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// http://www.raptorengineeringinc.com
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//
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//////////////////////////////////////////////////////////////////////////////////
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module main(
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input clk,
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input gpmc_advn,
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input gpmc_oen,
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input gpmc_wen,
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inout [7:0] gpmc_data,
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input [RAM_ADDR_BITS:0] gpmc_address,
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input usermem_wen,
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output reg usermem_wait,
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inout [7:0] usermem_data,
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inout [RAM_ADDR_BITS:0] usermem_address,
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output reg userproc_start,
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input userproc_done,
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input [3:0] four_bit_leds,
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input [7:0] eight_bit_leds,
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output reg [3:0] four_bit_switches,
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output reg [7:0] eight_bit_switches,
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inout [15:0] sixteen_bit_io,
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input sixteen_bit_io_wen,
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output reg sixteen_bit_io_mode,
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input [3:0] sseg_mux,
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input [7:0] sseg_data);
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parameter RAM_ADDR_BITS = 14;
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reg [15:0] sixteen_bit_io_in;
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reg [15:0] sixteen_bit_io_out;
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reg [15:0] sixteen_bit_io_reg;
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reg sixteen_bit_io_wen_reg;
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assign sixteen_bit_io = (sixteen_bit_io_wen) ? sixteen_bit_io_out : 16'bz;
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always @(posedge clk) begin
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sixteen_bit_io_reg = sixteen_bit_io;
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sixteen_bit_io_wen_reg = sixteen_bit_io_wen;
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if (sixteen_bit_io_wen_reg == 1'b0) begin
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sixteen_bit_io_mode = 1'b1;
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sixteen_bit_io_in = sixteen_bit_io_reg;
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end else begin
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sixteen_bit_io_mode = 1'b0;
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end
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end
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reg [7:0] gpmc_data_out;
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reg gpmc_data_driven;
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assign gpmc_data = (gpmc_data_driven) ? gpmc_data_out : 8'bz;
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reg [7:0] usermem_data_out;
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assign usermem_data = (usermem_wen) ? usermem_data_out : 8'bz;
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wire data_storage_clka;
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reg [7:0] data_storage_dina;
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reg [(RAM_ADDR_BITS-1):0] data_storage_addra;
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reg data_storage_write_enable;
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wire [7:0] data_storage_data_out;
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assign data_storage_clka = clk;
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data_storage #(RAM_ADDR_BITS) data_storage(.clka(data_storage_clka), .dina(data_storage_dina), .addra(data_storage_addra),
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.wea(data_storage_write_enable), .douta(data_storage_data_out));
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wire lcd_data_storage_clka;
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wire lcd_data_storage_clkb;
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reg [7:0] lcd_data_storage_dina;
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reg [7:0] lcd_data_storage_dinb;
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reg [4:0] lcd_data_storage_addra;
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reg [4:0] lcd_data_storage_addrb;
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reg lcd_data_storage_wea;
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reg lcd_data_storage_web;
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wire [7:0] lcd_data_storage_douta;
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wire [7:0] lcd_data_storage_doutb;
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assign lcd_data_storage_clka = clk;
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assign lcd_data_storage_clkb = clk;
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lcd_data_storage lcd_data_storage(.clka(lcd_data_storage_clka), .clkb(lcd_data_storage_clkb),
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.dina(lcd_data_storage_dina), .dinb(lcd_data_storage_dinb),
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.addra(lcd_data_storage_addra), .addrb(lcd_data_storage_addrb),
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.wea(lcd_data_storage_wea), .web(lcd_data_storage_web),
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.douta(lcd_data_storage_douta), .doutb(lcd_data_storage_doutb));
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//-----------------------------------------------------------------------------------
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//
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// Create a 12.5MHz clock for the seven-segement LED emulator
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//
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//-----------------------------------------------------------------------------------
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reg clk_div_by_two;
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reg clk_div_by_two_oneeighty;
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reg clk_div_by_four;
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reg clk_div_by_eight;
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reg clk_div_by_sixteen;
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always @(posedge clk) begin
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clk_div_by_two = !clk_div_by_two;
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end
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always @(negedge clk_div_by_two) begin
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clk_div_by_two_oneeighty = !clk_div_by_two_oneeighty;
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end
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always @(posedge clk_div_by_two_oneeighty) begin
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clk_div_by_four = !clk_div_by_four;
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end
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always @(posedge clk_div_by_four) begin
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clk_div_by_eight = !clk_div_by_eight;
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end
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always @(posedge clk_div_by_eight) begin
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clk_div_by_sixteen = !clk_div_by_sixteen;
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end
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//-----------------------------------------------------------------------------------
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//
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// Keep track of what is on the LED display
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//
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//-----------------------------------------------------------------------------------
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reg [7:0] led_display_bytes [3:0];
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reg [17:0] digit_blanker_1 = 0;
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reg [17:0] digit_blanker_2 = 0;
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reg [17:0] digit_blanker_3 = 0;
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reg [17:0] digit_blanker_4 = 0;
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reg [7:0] sseg_data_latch;
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reg [3:0] sseg_mux_latch;
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always @(negedge clk_div_by_sixteen) begin
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sseg_data_latch = sseg_data;
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sseg_mux_latch = sseg_mux;
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if (sseg_mux_latch[0] == 0) begin
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led_display_bytes[0] = sseg_data_latch;
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digit_blanker_1 = 0;
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digit_blanker_2 = digit_blanker_2 + 1;
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digit_blanker_3 = digit_blanker_3 + 1;
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digit_blanker_4 = digit_blanker_4 + 1;
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end
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if (sseg_mux_latch[1] == 0) begin
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led_display_bytes[1] = sseg_data_latch;
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digit_blanker_1 = digit_blanker_1 + 1;
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digit_blanker_2 = 0;
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digit_blanker_3 = digit_blanker_3 + 1;
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digit_blanker_4 = digit_blanker_4 + 1;
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end
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if (sseg_mux_latch[2] == 0) begin
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led_display_bytes[2] = sseg_data_latch;
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digit_blanker_1 = digit_blanker_1 + 1;
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digit_blanker_2 = digit_blanker_2 + 1;
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digit_blanker_3 = 0;
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digit_blanker_4 = digit_blanker_4 + 1;
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end
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if (sseg_mux_latch[3] == 0) begin
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led_display_bytes[3] = sseg_data_latch;
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digit_blanker_1 = digit_blanker_1 + 1;
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digit_blanker_2 = digit_blanker_2 + 1;
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digit_blanker_3 = digit_blanker_3 + 1;
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digit_blanker_4 = 0;
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end
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if (digit_blanker_1 > 128000) begin
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led_display_bytes[0] = 255;
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end
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if (digit_blanker_2 > 128000) begin
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led_display_bytes[1] = 255;
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end
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if (digit_blanker_3 > 128000) begin
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led_display_bytes[2] = 255;
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end
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if (digit_blanker_4 > 128000) begin
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led_display_bytes[3] = 255;
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end
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end
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//-----------------------------------------------------------------------------------
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//
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// Memory and register access
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//
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//-----------------------------------------------------------------------------------
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reg gpmc_advn_reg;
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reg gpmc_oen_reg;
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reg gpmc_wen_reg;
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reg [7:0] gpmc_data_reg;
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reg [RAM_ADDR_BITS:0] gpmc_address_reg;
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reg usermem_wen_reg;
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reg [7:0] usermem_data_reg;
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reg [RAM_ADDR_BITS:0] usermem_address_reg;
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always @(posedge clk) begin
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usermem_wen_reg = usermem_wen;
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usermem_data_reg = usermem_data;
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usermem_address_reg = usermem_address;
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gpmc_advn_reg = gpmc_advn;
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gpmc_oen_reg = gpmc_oen;
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gpmc_wen_reg = gpmc_wen;
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gpmc_data_reg = gpmc_data;
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if (gpmc_advn_reg == 1'b0) begin
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gpmc_address_reg = gpmc_address;
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data_storage_write_enable = 1'b0;
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lcd_data_storage_wea = 1'b0;
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end
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if (gpmc_address_reg[RAM_ADDR_BITS] == 1'b1) begin
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// System memory access
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usermem_wait = 1'b1;
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if (gpmc_wen_reg == 1'b0) begin
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data_storage_addra = gpmc_address_reg[(RAM_ADDR_BITS-1):0];
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data_storage_dina = gpmc_data_reg;
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data_storage_write_enable = 1'b1;
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end else begin
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data_storage_addra = gpmc_address_reg[(RAM_ADDR_BITS-1):0];
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data_storage_write_enable = 1'b0;
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gpmc_data_out = data_storage_data_out;
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end
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end else begin
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// User memory access
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usermem_wait = 1'b0;
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if (usermem_address_reg[RAM_ADDR_BITS] == 1'b1) begin
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// Interdevice communication region
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// MEMORY MAP
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// 0x20 - 0x3f: LCD data area
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if (usermem_wen_reg == 1'b0) begin
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if (usermem_address_reg[(RAM_ADDR_BITS-1):5] == 1) begin // Address range 0x20 - 0x3f
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lcd_data_storage_addrb = usermem_address_reg[4:0];
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lcd_data_storage_dinb = usermem_data_reg;
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lcd_data_storage_web = 1'b1;
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end
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end else begin
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if (usermem_address_reg[(RAM_ADDR_BITS-1):5] == 1) begin // Address range 0x20 - 0x3f
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lcd_data_storage_addrb = usermem_address_reg[4:0];
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lcd_data_storage_web = 1'b0;
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usermem_data_out = lcd_data_storage_doutb;
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end else begin
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// Default
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usermem_data_out = 8'b00000000;
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end
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end
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end else begin
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// Client scratchpad memory area
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if (usermem_wen_reg == 1'b0) begin
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data_storage_addra = usermem_address_reg[(RAM_ADDR_BITS-1):0];
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data_storage_dina = usermem_data_reg;
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data_storage_write_enable = 1'b1;
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end else begin
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data_storage_addra = usermem_address_reg[(RAM_ADDR_BITS-1):0];
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data_storage_write_enable = 1'b0;
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usermem_data_out = data_storage_data_out;
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end
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end
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// Configuration register access
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// MEMORY MAP
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// 0x00: Model number (read only)
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// 0x01: Version (read only)
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// 0x02: 4-bit I/O (lower 4 bits only)
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// 0x03: 8-bit I/O
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// 0x04: 16-bit I/O (upper 8 bits)
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// 0x05: 16-bit I/O (lower 8 bits)
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// 0x06: 7-segment LED digit 0 (read only)
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// 0x07: 7-segment LED digit 1 (read only)
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// 0x08: 7-segment LED digit 2 (read only)
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// 0x09: 7-segment LED digit 3 (read only)
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// 0x0a: User process register
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// Bit 0: User processing start
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// Bit 1: User processing done (read only)
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// 0x20 - 0x3f: LCD data area
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if (gpmc_wen_reg == 1'b0) begin
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if (gpmc_address_reg[(RAM_ADDR_BITS-1):5] == 1) begin // Address range 0x20 - 0x3f
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lcd_data_storage_addra = gpmc_address_reg[4:0];
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lcd_data_storage_dina = gpmc_data_reg;
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lcd_data_storage_wea = 1'b1;
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end else begin
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case (gpmc_address_reg[(RAM_ADDR_BITS-1):0])
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2: begin
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four_bit_switches = gpmc_data_reg[3:0];
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end
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3: begin
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eight_bit_switches = gpmc_data_reg;
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end
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4: begin
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sixteen_bit_io_out[15:8] = gpmc_data_reg;
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end
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5: begin
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sixteen_bit_io_out[7:0] = gpmc_data_reg;
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end
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10: begin
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userproc_start = gpmc_data_reg[0];
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end
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default: begin
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// Do nothing
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end
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endcase
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end
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end else begin
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if (gpmc_address_reg[(RAM_ADDR_BITS-1):5] == 1) begin // Address range 0x20 - 0x3f
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lcd_data_storage_addra = gpmc_address_reg[4:0];
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lcd_data_storage_wea = 1'b0;
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gpmc_data_out = lcd_data_storage_douta;
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end else begin
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case (gpmc_address_reg[(RAM_ADDR_BITS-1):0])
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0: begin
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gpmc_data_out = 8'b01000010;
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end
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1: begin
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gpmc_data_out = 8'b00000001;
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end
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2: begin
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gpmc_data_out[7:4] = 0;
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gpmc_data_out[3:0] = four_bit_leds;
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end
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3: begin
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gpmc_data_out = eight_bit_leds;
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end
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4: begin
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gpmc_data_out = sixteen_bit_io_in[15:8];
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end
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5: begin
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gpmc_data_out = sixteen_bit_io_in[7:0];
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end
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6: begin
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gpmc_data_out = led_display_bytes[0];
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end
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7: begin
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gpmc_data_out = led_display_bytes[1];
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end
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8: begin
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gpmc_data_out = led_display_bytes[2];
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end
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9: begin
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gpmc_data_out = led_display_bytes[3];
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end
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10: begin
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gpmc_data_out[0] = userproc_start;
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gpmc_data_out[1] = userproc_done;
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gpmc_data_out[7:2] = 0;
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end
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default: begin
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gpmc_data_out = 0;
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end
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endcase
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end
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end
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end
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gpmc_data_driven = ((~gpmc_oen) && gpmc_wen);
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end
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endmodule
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