# This file is part of the Universal Laboratory (uLab) # # © 2017 - 2019 Raptor Engineering, LLC # All Rights Reserved # # Licensed under the terms of the AGPL v3 # Main system clock set_io clk J3 # Guest FPGA interface set_io reset A16 set_io four_bit_output[3] C16 set_io four_bit_output[2] D16 set_io four_bit_output[1] E16 set_io four_bit_output[0] F16 set_io four_bit_input[3] B16 set_io four_bit_input[2] D14 set_io four_bit_input[1] D15 set_io four_bit_input[0] E14 set_io eight_bit_output[7] G16 set_io eight_bit_output[6] H16 set_io eight_bit_output[5] J15 set_io eight_bit_output[4] G14 set_io eight_bit_output[3] K14 set_io eight_bit_output[2] K15 set_io eight_bit_output[1] M16 set_io eight_bit_output[0] N16 set_io eight_bit_input[7] F15 set_io eight_bit_input[6] G15 set_io eight_bit_input[5] H14 set_io eight_bit_input[4] F14 set_io eight_bit_input[3] J14 set_io eight_bit_input[2] K16 set_io eight_bit_input[1] L16 set_io eight_bit_input[0] M15 set_io sixteen_bit_output[15] B1 set_io sixteen_bit_output[14] C1 set_io sixteen_bit_output[13] D1 set_io sixteen_bit_output[12] E2 set_io sixteen_bit_output[11] F2 set_io sixteen_bit_output[10] G2 set_io sixteen_bit_output[9] H2 set_io sixteen_bit_output[8] J2 set_io sixteen_bit_output[7] K3 set_io sixteen_bit_output[6] L3 set_io sixteen_bit_output[5] M2 set_io sixteen_bit_output[4] N3 set_io sixteen_bit_output[3] P1 set_io sixteen_bit_output[2] A11 set_io sixteen_bit_output[1] B13 set_io sixteen_bit_output[0] A15 set_io sixteen_bit_input[15] B2 set_io sixteen_bit_input[14] C2 set_io sixteen_bit_input[13] D2 set_io sixteen_bit_input[12] F1 set_io sixteen_bit_input[11] G1 set_io sixteen_bit_input[10] H1 set_io sixteen_bit_input[9] R1 set_io sixteen_bit_input[8] J1 set_io sixteen_bit_input[7] K1 set_io sixteen_bit_input[6] L1 set_io sixteen_bit_input[5] M1 set_io sixteen_bit_input[4] N2 set_io sixteen_bit_input[3] P2 set_io sixteen_bit_input[2] B11 set_io sixteen_bit_input[1] B14 set_io sixteen_bit_input[0] B15 set_io lcd_data_in_address[5] T11 set_io lcd_data_in_address[4] N10 set_io lcd_data_in_address[3] N12 set_io lcd_data_in_address[2] T13 set_io lcd_data_in_address[1] T15 set_io lcd_data_in_address[0] R16 set_io lcd_data_in_data[7] R6 set_io lcd_data_in_data[6] T8 set_io lcd_data_in_data[5] R9 set_io lcd_data_in_data[4] P9 set_io lcd_data_in_data[3] R10 set_io lcd_data_in_data[2] P10 set_io lcd_data_in_data[1] M11 set_io lcd_data_in_data[0] P13 set_io lcd_data_in_enable T14 set_io led_segment_bus[7] T1 set_io led_segment_bus[6] R2 set_io led_segment_bus[5] R3 set_io led_segment_bus[4] T5 set_io led_segment_bus[3] T6 set_io led_segment_bus[2] T7 set_io led_segment_bus[1] T9 set_io led_segment_bus[0] P8 set_io led_digit_select[3] T2 set_io led_digit_select[2] T3 set_io led_digit_select[1] R4 set_io led_digit_select[0] R5