diff --git a/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.ucf b/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.ucf
index 1504c2e..ab433e5 100644
--- a/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.ucf
+++ b/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.ucf
@@ -4,5 +4,5 @@
 NET "clk"  LOC = "V10";
 TIMESPEC TS_clk = PERIOD clk 100000 kHz;
 
-NET "serial_input"  LOC = "N17";
-NET "serial_output"  LOC = "N18";
+NET "serial_input"  LOC = "T12";
+NET "serial_output"  LOC = "M10";