Enable remaining I/O busses on Lattice control FPGA

master
Timothy Pearson 5 years ago
parent 20c5aa2c0f
commit 1733ea93c9

@ -49,6 +49,58 @@ set_io eight_bit_input[2] K16
set_io eight_bit_input[1] L16
set_io eight_bit_input[0] M15
set_io sixteen_bit_output[15] B1
set_io sixteen_bit_output[14] C1
set_io sixteen_bit_output[13] D1
set_io sixteen_bit_output[12] E2
set_io sixteen_bit_output[11] F2
set_io sixteen_bit_output[10] G2
set_io sixteen_bit_output[9] H2
set_io sixteen_bit_output[8] J2
set_io sixteen_bit_output[7] K3
set_io sixteen_bit_output[6] L3
set_io sixteen_bit_output[5] M2
set_io sixteen_bit_output[4] N3
set_io sixteen_bit_output[3] P1
set_io sixteen_bit_output[2] A11
set_io sixteen_bit_output[1] B13
set_io sixteen_bit_output[0] A15
set_io sixteen_bit_input[15] B2
set_io sixteen_bit_input[14] C2
set_io sixteen_bit_input[13] D2
set_io sixteen_bit_input[12] F1
set_io sixteen_bit_input[11] G1
set_io sixteen_bit_input[10] H1
set_io sixteen_bit_input[9] R1
set_io sixteen_bit_input[8] J1
set_io sixteen_bit_input[7] K1
set_io sixteen_bit_input[6] L1
set_io sixteen_bit_input[5] M1
set_io sixteen_bit_input[4] N2
set_io sixteen_bit_input[3] P2
set_io sixteen_bit_input[2] B11
set_io sixteen_bit_input[1] B14
set_io sixteen_bit_input[0] B15
set_io lcd_data_in_address[5] T11
set_io lcd_data_in_address[4] N10
set_io lcd_data_in_address[3] N12
set_io lcd_data_in_address[2] T13
set_io lcd_data_in_address[1] T15
set_io lcd_data_in_address[0] R16
set_io lcd_data_in_data[7] R6
set_io lcd_data_in_data[6] T8
set_io lcd_data_in_data[5] R9
set_io lcd_data_in_data[4] P9
set_io lcd_data_in_data[3] R10
set_io lcd_data_in_data[2] P10
set_io lcd_data_in_data[1] M11
set_io lcd_data_in_data[0] P13
set_io lcd_data_in_enable T14
set_io led_segment_bus[7] T1
set_io led_segment_bus[6] R2
set_io led_segment_bus[5] R3

@ -52,7 +52,7 @@ set_io sixteen_bit_output[6] L3
set_io sixteen_bit_output[5] M2
set_io sixteen_bit_output[4] N3
set_io sixteen_bit_output[3] P1
set_io sixteen_bit_output[2] B12
set_io sixteen_bit_output[2] A11
set_io sixteen_bit_output[1] B13
set_io sixteen_bit_output[0] A15

@ -17,6 +17,12 @@ module control_fpga_top
output wire [3:0] four_bit_input, // Input to the user program from the remote access module
input wire [7:0] eight_bit_output, // Output from the user program to the remote access module
output wire [7:0] eight_bit_input, // Input to the user program from the remote access module
input wire [15:0] sixteen_bit_output, // Output from the user program to the remote access module
output wire [15:0] sixteen_bit_input, // Input to the user program from the remote access module
input wire [5:0] lcd_data_in_address,
input wire [7:0] lcd_data_in_data,
input wire lcd_data_in_enable,
input wire [7:0] led_segment_bus,
input wire [3:0] led_digit_select,
@ -51,14 +57,6 @@ module control_fpga_top
reg [7:0] diagnostic_led_data = 8'b0;
wire [15:0] sixteen_bit_output; // Output from the user program to the remote access module
wire [15:0] sixteen_bit_input; // Input to the user program from the remote access module
wire [5:0] lcd_data_in_address;
wire [7:0] lcd_data_in_data;
wire lcd_data_in_enable;
assign sixteen_bit_output = 16'b0; // Diable 16 bit input for now
//assign led_bank = eight_bit_input; // Mirror input to the LEDs
assign led_bank = diagnostic_led_data; // Show diagnostic data on LEDs
@ -84,10 +82,6 @@ module control_fpga_top
end
end
assign lcd_data_in_enable = 1'b0; // Disable LCD I/O for now
assign lcd_data_in_address = 6'b0; // Disable LCD I/O for now
assign lcd_data_in_data = 8'b0; // Disable LCD I/O for now
// Instantiate main remote access module
remote_access #(RAM_ADDR_BITS) remote_access(.main_fifty_clock(main_50_mhz_clock), .user_logic_reset(guest_logic_reset), .remote_access_4_bit_output(four_bit_output),
.remote_access_4_bit_input(four_bit_input), .remote_access_8_bit_output(eight_bit_output),

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