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258 lines
9.6 KiB
258 lines
9.6 KiB
<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE language SYSTEM "language.dtd">
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<language name="Verilog" version="2" kateversion="2.4" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license="">
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<highlighting>
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<list name="keywords">
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<item> macromodule </item>
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<item> table </item>
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<item> endtable </item>
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<item> specify </item>
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<item> specparam </item>
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<item> endspecify </item>
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<item> defparam </item>
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<item> default </item>
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<item> if </item>
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<item> ifnone </item>
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<item> else </item>
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<item> forever </item>
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<item> while </item>
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<item> for </item>
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<item> wait </item>
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<item> repeat </item>
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<item> disable </item>
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<item> assign </item>
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<item> deassign </item>
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<item> force </item>
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<item> release </item>
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<item> always </item>
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<item> initial </item>
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<item> edge </item>
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<item> posedge </item>
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<item> negedge </item>
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<!-- verilog-2001 keywords -->
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<item> config </item>
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<item> endconfig </item>
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<item> library </item>
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<item> design </item>
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<item> liblist </item>
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<item> cell </item>
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<item> use </item>
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<item> instance </item>
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</list>
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<list name="beginwords">
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<item> begin </item>
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<item> fork </item>
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<item> module </item>
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<item> case </item>
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<item> casex </item>
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<item> casez </item>
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<item> task </item>
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<item> function </item>
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<item> generate </item>
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</list>
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<list name="endwords">
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<item> end </item>
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<item> join </item>
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<item> endmodule </item>
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<item> endcase </item>
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<item> endtask </item>
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<item> endfunction </item>
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<item> endgenerate </item>
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</list>
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<list name="strength">
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<!-- drive strength supply0/supply1 omitted, its in types.. -->
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<item> strong0 </item>
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<item> strong1 </item>
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<item> pull0 </item>
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<item> pull1 </item>
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<item> weak0 </item>
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<item> weak1 </item>
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<item> highz0 </item>
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<item> highz1 </item>
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<!-- charge strength -->
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<item> small </item>
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<item> medium </item>
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<item> large </item>
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</list>
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<list name="gates">
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<item> pullup </item>
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<item> pulldown </item>
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<item> cmos </item>
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<item> rcmos </item>
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<item> nmos </item>
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<item> pmos </item>
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<item> rnmos </item>
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<item> rpmos </item>
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<item> and </item>
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<item> nand </item>
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<item> or </item>
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<item> nor </item>
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<item> xor </item>
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<item> xnor </item>
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<item> not </item>
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<item> buf </item>
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<item> tran </item>
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<item> rtran </item>
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<item> tranif0 </item>
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<item> tranif1 </item>
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<item> rtranif0 </item>
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<item> rtranif1 </item>
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<item> bufif0 </item>
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<item> bufif1 </item>
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<item> notif0 </item>
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<item> notif1 </item>
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</list>
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<list name="types">
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<!-- port direction -->
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<item> input </item>
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<item> output </item>
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<item> inout </item>
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<!-- net type -->
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<item> wire </item>
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<item> tri </item>
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<item> tri0 </item>
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<item> tri1 </item>
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<item> wand </item>
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<item> wor </item>
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<item> triand </item>
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<item> trior </item>
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<item> supply0 </item>
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<item> supply1 </item>
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<!-- reg/variable -->
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<item> reg </item>
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<item> integer </item>
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<item> real </item>
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<item> realtime </item>
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<item> time </item>
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<!-- modifier -->
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<item> vectored </item>
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<item> scalared </item>
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<item> trireg </item>
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<!-- other -->
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<item> parameter </item>
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<item> event </item>
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<!-- verilog-2001 types -->
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<item> signed </item>
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<item> automatic </item>
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<item> genvar </item>
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<item> localparam </item>
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</list>
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<contexts>
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<context attribute="Normal Text" lineEndContext="#stay" name="Normal">
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<DetectSpaces />
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<RegExpr attribute="Keyword" context="Block name" String="begin\ *:" beginRegion="Block"/>
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<RegExpr attribute="Keyword" context="Block name" String="fork\ *:" beginRegion="Block"/>
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<keyword attribute="Keyword" String="beginwords" context="#stay" beginRegion="Block"/>
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<keyword attribute="Keyword" String="endwords" context="#stay" endRegion="Block"/>
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<keyword attribute="Keyword" context="#stay" String="keywords" />
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<keyword attribute="Data Type" context="#stay" String="types" />
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<keyword attribute="Drive/charge strength" context="#stay" String="strength" />
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<keyword attribute="Gate instantiation" context="#stay" String="gates" />
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<RegExpr attribute="Decimal" context="#stay" String="[\d_]*'d[\d_]+"/>
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<RegExpr attribute="Octal" context="#stay" String="[\d_]*'o[0-7xXzZ_]+"/>
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<RegExpr attribute="Hex" context="#stay" String="[\d_]*'h[\da-fA-FxXzZ_]+"/>
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<RegExpr attribute="Binary" context="#stay" String="[\d_]*'b[01_zZxX]+"/>
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<Float attribute="Float" context="#stay"/>
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<Int attribute="Integer" context="#stay" />
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<RegExpr attribute="Case label" context="#stay" String="[a-zA-Z0-9_, \t]+\s*:" firstNonSpace="true"/>
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<!--<RegExpr attribute="Port map" context="Port" String="\.[a-zA-Z0-9_]+"/>-->
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<DetectChar attribute="String" context="String" char="""/>
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<Detect2Chars attribute="Comment" context="Commentar 1" char="/" char1="/"/>
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<Detect2Chars attribute="Comment" context="Commentar 2" char="/" char1="*" beginRegion="Comment"/>
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<AnyChar attribute="Symbol" context="#stay" String="!%&()+,-<=+/:;>?[]^{|}~@"/>
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<DetectChar attribute="Preprocessor" context="Preprocessor" char="`" column="0"/>
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<RegExpr attribute="Preprocessor" context="#stay" String="\`[a-zA-Z_]+\w*" />
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<RegExpr attribute="System Task" context="#stay" String="\$[a-zA-Z_]+\w*" />
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<RegExpr attribute="Delay" context="#stay" String="#[\d_]+" />
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</context>
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<context attribute="String" lineEndContext="#pop" name="String">
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<LineContinue attribute="String" context="Some Context"/>
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<HlCStringChar attribute="String Char" context="#stay"/>
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<DetectChar attribute="String" context="#pop" char="""/>
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</context>
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<context attribute="Comment" lineEndContext="#pop" name="Commentar 1">
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<IncludeRules context="##Alerts" />
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</context>
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<context attribute="Comment" lineEndContext="#stay" name="Commentar 2">
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<IncludeRules context="##Alerts" />
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<Detect2Chars attribute="Comment" context="#pop" char="*" char1="/" endRegion="Comment"/>
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</context>
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<context attribute="Preprocessor" lineEndContext="#pop" name="Preprocessor">
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<LineContinue attribute="Preprocessor" context="Some Context"/>
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<RangeDetect attribute="Prep. Lib" context="#stay" char=""" char1="""/>
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<RangeDetect attribute="Prep. Lib" context="#stay" char="<" char1=">"/>
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<Detect2Chars attribute="Comment" context="Commentar 1" char="/" char1="/"/>
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<Detect2Chars attribute="Comment" context="Commentar/Preprocessor" char="/" char1="*"/>
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</context>
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<context attribute="Comment" lineEndContext="#stay" name="Commentar/Preprocessor">
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<Detect2Chars attribute="Comment" context="#pop" char="*" char1="/" />
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</context>
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<context attribute="Normal Text" lineEndContext="#pop" name="Some Context"/>
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<context attribute="Comment" lineEndContext="#stay" name="Some Context2">
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<IncludeRules context="##Alerts" />
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<StringDetect attribute="Comment" context="#pop" String="#endif" firstNonSpace="true"/>
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</context>
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<context attribute="Block name" lineEndContext="#pop" name="Block name">
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<DetectIdentifier attribute="Data Type" context="#pop"/>
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</context>
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<context attribute="Normal Text" lineEndContext="#stay" name="Port">
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<DetectIdentifier attribute="Normal Text" context="#pop"/>
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</context>
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</contexts>
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<itemDatas>
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<itemData name="Normal Text" defStyleNum="dsNormal"/>
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<itemData name="Keyword" defStyleNum="dsKeyword"/>
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<itemData name="Data Type" defStyleNum="dsDataType"/>
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<itemData name="Decimal" defStyleNum="dsBaseN"/>
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<itemData name="Octal" defStyleNum="dsBaseN"/>
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<itemData name="Hex" defStyleNum="dsBaseN"/>
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<itemData name="Binary" defStyleNum="dsBaseN"/>
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<itemData name="Float" defStyleNum="dsFloat"/>
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<itemData name="String" defStyleNum="dsString"/>
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<itemData name="String Char" defStyleNum="dsChar"/>
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<itemData name="Comment" defStyleNum="dsComment"/>
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<itemData name="Alert" defStyleNum="dsAlert" />
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<itemData name="Symbol" defStyleNum="dsNormal"/>
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<itemData name="Preprocessor" defStyleNum="dsOthers"/>
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<itemData name="Prep. Lib" defStyleNum="dsFloat"/>
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<itemData name="System Task" defStyleNum="dsDataType"/>
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<itemData name="Integer" defStyleNum="dsDecVal"/>
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<itemData name="Delay" defStyleNum="dsBaseN"/>
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<itemData name="Block name" defStyleNum="dsDataType"/>
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<itemData name="Drive/charge strength" defStyleNum="dsBaseN"/>
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<itemData name="Gate instantiation" defStyleNum="dsDataType"/>
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<itemData name="Port map" defStyleNum="dsDataType"/>
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<itemData name="Case label" defStyleNum="dsDecVal"/>
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</itemDatas>
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</highlighting>
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<general>
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<comments>
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<comment name="singleLine" start="//" />
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<comment name="multiLine" start="/*" end="*/" region="Comment"/>
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</comments>
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<keywords casesensitive="1" />
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</general>
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</language>
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